With the continuing trend in the wireless electronic industry towards miniaturization, the performance, size, and cost of millimeter wave (mmWave) systems are often limited by the packaging technology chosen. The packaging approach selected must both offer mechanical support and electrically connect the various microwave components. Critical components include RFIC chips, high-efficiency antennas, transmission lines, capacitors, inductors, resistors, MEMS devices, and various types of filters. RFIC chips are fabricated using various semiconductor technologies such as Si, GaAs, CMOS or SiGe can be attached within the packages.
The packaging approach for mmWave transceiver applications operating from 1 to 100 GHz needs to incorporate an antenna to fully function as a radio. Currently, the greatest challenge for integrating any antenna structure into a suitable package is to ensure proper antenna efficiency. Materials, such as Si is traditionally avoided, or used with caution at high frequencies due to the interference with antenna performance. The only option has traditionally been to use highly complex and costly packaging technologies, or expensive low-temperature co-fired ceramic (LTCC) substrates. Recently potentially low cost plastic packaging has been reported for single-chip solutions, however, the packaging method is difficult to use for mass production. In addition, phased arrays, used for beam steering, and focal plane imaging arrays require a multitude of pixels (each represented by an antenna) that demand low-cost wafer level integration of mmWave RFIC chips, RF passive components and antennas.
A variety of approaches have been proposed to create so-called systems-in-a-package (SiP) containing required RFIC chips, shielding and passive components for the given RF application, where the most frequent approach is to simply combine discrete devices onto a common substrate. This is what's known as a RF SiP where a single package system/sub-system integrates one or more ICs (or RFICs) and/or embedded passive components. Some typical applications include transceiver SiP, full radio SiP, FEM (Front End Module), ASM (Antenna Switch Module), and PAM (Power Amplifier Module). However, these applications have all in common individual devices that are not an integral part of the substrate and therefore need to be mounted or connected to a common substrate. This approach is very similar to what is known as Multi-Chip modules (MCM) in which several IC chips are connected together on a common custom-designed substrate containing interconnect layers.
Further, enhancements to multi-layered thin-film MCM substrates have demonstrated the inclusion of simple RF passives such as resistors, inductors and capacitors to be embedded within the interconnect layers. Such a substrate may then further serve as the basic building block to create a RF SiP where both active devices (RFIC chips) and discrete passive components (PIN diodes, varactor diodes etc) can be attached and assembled to the surface and connected using either wire or flip-chip bonding. Packaging in the form of RF-MEMs-SiP modules including passive components is described in a publication by J. A. C. Tilmans et al. entitled “MEMS for wireless communications: ‘from RF-MEMS components to RF-MEMS-SiP’” published in the Journal of Micromechanics and Microengineering, 13 (2003) S139-S163. Thus, as a packaging technology platform, SiP allows a high degree of flexibility in the package architecture, particularly for RF applications [3]. RF SiP packaging is described in a publication by J. Wu et al. entitled “RF SiP Technology: Integration and Innovation” Gaasmantech 2004. The greatest challenge to these packaging approaches (SiP and MCM) is the thermal mismatch between the various components attached to the common carrier substrate. Secondly, for high frequency applications the physical distance set between the active circuit and passive devices (such as the antenna) greatly challenge RF circuit optimization.
In order to integrate an antenna in a package, while simultaneously ensure proper antenna efficiency a relative complex packaging approach using an flip-chip mounted antenna in conjunction with the printed circuit board has been described in U.S. Patent Publication No. 20060001572 published Jan. 5, 2006. Although this approach demonstrates a possible avenue for automated assembly, the packaging approach does not leverage cost saving features from mass production approach. Furthermore, hermetic sealing of the components using this approach is challenging and not realistically viable